In a backside illumination type CMOS image sensor disclosed in Patent Literature 1, which adopts a pixel sharing layout as a countermeasure against PRNU (photo response non uniformity: sensitivity ununiformity), pixel transistors (hereinafter, referred to as pixel Tr.) are divided into two groups, and Trs. are symmetrically arranged.
This technology is directed to equalize an amount of reflection or absorption of incident light from the back surface side by polysilicon of the transistors (Trs.) between the two groups by symmetrically arranging an amplification Tr. (hereinafter referred to as AMP), a selection Tr. (hereinafter referred to as SEL), and a reset Tr. (hereinafter referred to as RST) with respect to a photodiode (hereinafter referred to as PD).